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scc1300 - d02 murata electronics oy subject to changes 1 / 34 www.muratamems.fi doc.nr. 82113000 rev. c scc1300 - d02 combined gyroscope and 3 - axis a ccelerometer with digital spi interfaces features ? 1 00 o/s angular rate measurement range ? 2 g 3- axis acceleration measurement range ? angular rate measurement around x axis ? angular rate sensor except ionally insensitive to mechanical vibrations and shocks ? superior bias s tability for mems gyroscopes (<1o/h) ? digital spi interfacing ? enhanced self diagnostics features ? small size : 8.5 x 18.7 x 4.5 mm (w x l x h ) ? rohs compliant robust packaging suitable for lead - free soldering process and smd mounting ? proven capacitive 3d - mems technology ? temperature range - 40 c...+125 c applications the scc1300 -d0 2 is targeted at applications demanding high stability with tough environmental requirements. typical ap plications include : ? inertial measurement units (imus) for highly demanding environments ? platform stabilization and control ? motion analysis and control ? roll over detection ? robotic control systems ? guidance systems ? navigation systems overview the scc1300 -d0 2 is a combined high performance gyroscope and accelerometer component. the sensor is based on murata? s proven capacitive 3d - mems technology . the component integrates angular rate and acceleration sensing together with flexible separate digital spi inte rfaces . the s mall robust packaging guarantees reliable operation over the product ?s lifetime. the housing is suitable for smd mounting . t he component is compatible with rohs and elv directives. the scc1300 -d0 2 is designed, manufactured and tested for high stability, reliability and quality requirements. the angular rate and acceleration sensors provide highly stable output over wide ranges of temperature and mechanical noise. the angular rate sensor bias stability is in the elite of mems gyros . it is also exceptionally insensitive to all mechanical vibrations and shocks . the c omponent has several advanced self diagnostics features. data s heet
scc1300 - d0 2 murata electronics oy subject to changes 2 / 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c table of contents 1 introduction ................................................................ ................................ ..................................... 4 2 specifications ................................................................ ................................ .................................. 4 2.1 performance specifications for gyroscope .............................................................................................. 4 2.2 performance specific ations for accelerometer ........................................................................................ 5 2.3 absolute maximum ratings ........................................................................................................................ 6 2.4 pin description ............................................................................................................................................. 6 2.5 digital i/o specification ............................................................................................................................... 8 2.6 spi ac characteristics ................................................................................................................................ 9 2.7 measurement axis and directions ........................................................................................................... 10 2.8 package characteristics ............................................................................................................................ 11 2.8.1 package outline drawing ............................................................................................................... 11 2.8.2 pcb fo otprint .................................................................................................................................. 12 2.9 abbreviations ............................................................................................................................................. 12 3 general product description ................................................................ ........................................ 13 3.1 factory calibration ..................................................................................................................................... 13 4 reset and power up ................................................................ ..................................................... 14 4.1 gyro power - up sequence ......................................................................................................................... 14 4.1.1 gyro reset ....................................................................................................................................... 14 4.2 accelerometer power - up sequence ......................................................................................................... 14 4.2.1 accelerometer reset ....................................................................................................................... 15 5 component interfacing ................................................................ ................................................. 16 5.1 spi interfaces .............................................................................................................................................. 16 5.2 gyroscope interface .................................................................................................................................. 16 5.2.1 gyro spi communication overview ............................................................................................. 16 5.2.2 gyro spi read frame ..................................................................................................................... 17 5.2. 3 gyro spi write frame ..................................................................................................................... 19 5.2.4 gyro spi mixed access mode ........................................................................................................ 20 5.3 gyroscope asic addressing space ........................................................................................................ 21 5.3.1 angular rate output register ....................................................................................................... 21 5.3.1.1 example of rate data conversion .................................................................................... 22 5.3.2 gyro temperature output register .............................................................................................. 22 5.3.2.1 example of gyro temperature conversion ................................................................... 22 5.4 accelerometer interface ............................................................................................................................ 23 5.4.1 accelerometer spi communication overview ............................................................................. 23 5.4.2 accelerometer spi read frame ..................................................................................................... 24 5.4.3 accelerometer spi write frame .................................................................................................... 25 5.4.4 accelerometer decremented register read operation .............................................................. 25
scc1300 - d0 2 murata electronics oy subject to changes 3 / 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.4.5 accelerometer spi error conditioning (self diagnostics) ......................................................... 26 5.4.5.1 frme bit ............................................................................................................................... 26 5.4.5.2 porst bit ............................................................................................................................ 26 5.4.5.3 st bit .................................................................................................................................... 26 5.4.5.4 sat bit .................................................................................................................................. 26 5.4.5.5 apar bit ............................................................................................................................... 26 5.4.5.6 dpar bit ............................................................................................................................... 27 5.4.5.7 fixed bits ............................................................................................................................. 27 5.4.5.8 spi error effect on acceleration output data .................................................................... 27 5.5 accelerometer asic addressing space .................................................................................................. 28 5.5.1 control register (ctrl) ................................................................................................................. 29 5. 5.2 acceleration output registers ........................................................................................................ 29 5.5.2.1 example of acceleration data conversion ........................................................................ 29 5.5.3 accelerometer temperature output r egisters ............................................................................ 30 5.5.3.1 example of accelerometer temperature conversion ....................................................... 30 6 application information ................................................................ ................................................ 31 6.1 application circuitry and external component characteristics ........................................................... 31 6.1.1 separate analog and digital ground layers with long power supply lines .......................... 32 6.2 boost regulator and power supply decoupling in layout ................................................................... 33 6.2.1 layout example ............................................................................................................................... 33 6.2.2 thermal connection ....................................................................................................................... 34 6.3 assembly instructions ............................................................................................................................... 34
scc1300 - d0 2 murata electronics oy subject to changes 4 / 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 1 introduction this document contains essential technical information about the scc1 300 sensor , including s pecifications, spi interface descriptions , user accessible register details , electrical propert ies and application information . this document should be used as a reference when designing in scc1300 component. 2 specifications 2.1 perform ance specifications for gyroscope table 1 . gyroscope performance specifications (avdd = 5 v, dvdd = 3.3 v and ambient temperature unless otherwise specified). parameter condition min a) typ max a) unit analog supply vol tage 4.75 5 5.25 v analog supply current temperature range - 40 ... +125 c 24 26 29.5 ma digital supply voltage 3.0 3.3 3.6 v digital supply current temperature range - 40 ... +125 c 16 20 24 ma operating range measurement axis x - 1 00 1 00 / s offset error b) - 1 1 /s offset over temperature temperature range - 40 ... +125 c temperature range - 10 ? +60 c - 0. 6 - 0. 3 0. 6 0. 3 /s /s offset drift velocity temperature gradient 2.5 k/min - 0. 3 0. 3 (/s)/min offset short term instabil ity c) <1 /h angular random walk (arw) c) 0. 45 o / h sensitivity 50 lsb/(/s) sensitivity over temperature temperature range - 40 ... +125 c - 1 1 % total sensitivity error b) - 2 2 % nonlinearity temperature ra nge - 40 ... +125 c - 0.5 0.5 /s noise (rms) 0. 06 0. 1 /s noise density 0.0 085 ( o/s ) / hz cross - axis sensitivity 1.7 % g - sensitivity - 0.1 0.1 (/s)/g shock sensitivity 50g, 6ms 2.0 /s shock recovery time 50.0 ms ampl itude response - 3db frequency 50 hz power on setup time 0.8 s output data rate 2 khz output load 200 pf spi clock rate 0.1 8 mhz a) min/max values are 3 sigma variation limits from validation test population. b) includin g calibration error and drift over lifetime. c) based on allan variance measurements ( figure 1 b). d) cross - axis sensitivity is the maximum sensitivity in the plane perpendicular to the measuring direction rel ative to the sensiti vity in the measuring direction. the specified limit must not be exceeded by either axis. figure 1 a) scc1300 - d0 2 gyroscope offset over full temperature range, b) allan variance curve SCC1300-D02 gyro bias vs. temperature -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 -40 -20 0 20 40 60 80 100 120 temperature [oc] angular rate offset [o/s] +3sigma avg -3sigma SCC1300-D02 allan variance curve 0.1 1 10 100 0.1 1 10 100 1000 10000 100000 tau [s] allan deviation [o/h] +3 sigma average
scc1300 - d0 2 murata electronics oy subject to changes 5 / 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 2.2 performanc e specifications for accelerometer table 2 . acc e lerometer performance specifications (vdd = 3.3v and ambient temperature unless otherwise specified). parameter condition min a) typ max a) unit analog and digital supply voltage 3.0 3.3 3.6 v current consumption active mode 3 5 ma power down mode 0.12 ma measurement range measurement axes x, y & z - 2 2 g offset error b) @25 c 5c - 16 16 mg offset temperature drift c) temperature range - 40 ... +125 c - 18 18 mg sensitivity 1 3 bit output between 3 1800 0.032 lsb/g /lsb total sensitivity error temperature range - 40 ... +125 c - 4 4 % fs sensitivity calibration error @25 c 5c - 0.5 0.5 % fs sensitivity temperature drift temperature rang e - 40 ... +125 c - 0.8 0.8 % fs linearity error +1g ... - 1g range - 20 20 mg cross - axis sensitivity d) - 2.5 2.5 % zero acceleration output 2 - complement format 0 lsb amplitude response e) - 3db frequency 30 55 hz noise 3 5 mg rms power on setup time 0.1 s output data rate 2000 hz output load 50 pf spi clock rate 8 mhz a) min/max values are 3 sigma variation limits from validation test population. b) includes offset deviation from 0g value, including calib ration error and drift over lifetime. c) biggest change of output from rt value due to temperature. d) cross - axis sensitivity is the maximum sensitivity in the plane perpendicular to the measuring direction relative to the sensitivity in the meas uring direction. it is calculated as the geometric sum of the sensitivities in two perpendicular directions (sx and sy) in this plane . e) see figure 2 . figure 2 . scc1300 - d0 2 accelerometer f requency response curves
scc1300 - d0 2 murata electronics oy subject to changes 6 / 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 2.3 absolute maximum ratings table 3 . absolute maximum ratings of the scc1300 sensor. parameter condition min typ max unit gyroscope supply voltages analog supply voltage, avdd_g - 0.5 7 v digital supply voltage, dvdd_g - 0.3 3.6 v maximum voltage at analog input/output pins - 0.3 avdd_g + 0.3v maximum voltage at digital input/output pins - 0.3 dvdd_g + 0.3 v accelerometer supply voltages digital supply voltage, dvdd_a - 0 .3 3.6 v analog supply voltage, avdd_a - 0.5 7.0 v maximum voltage at input / output pins - 0.3 dvdd_a + 0.3v v general component ratings operating temperature - 40 125 c storage temperature - 40 125 c max 96h - 40 150 c maximum juncti on temperature during lifetime. note: device has to be functional, but not in full spec. 155 c mechanical shock 3000 g esd hbm 2 kv cdm 500 v ultrasonic agitation (cleaning, welding, etc) prohibited 2.4 pin description the p inout for th e scc1300 is presented below in figure 3 . ( see table 4 for p in description ) figure 3 . scc1300 pinout diagram. heat refgnd_g vrefp_g extresn_g reserved ahvvdds_g lhv dvdd_g dvss_g miso_g sck_a mosi_a dvdd_a reserved dvss_a heat heat reserved avss_a avdd_a csb_a miso_a mosi_g sck_g csb_g avdd_g reserved reserved avss_g reser ved reserved heat
scc1300 - d0 2 murata electronics oy subject to changes 7 / 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c tabl e 4 . scc1300 pin description pin # name type 1) pd/pu/hv 2) description 1 heat ai heatsink connection, connect to avss_g. 2 refgnd_g ai analog reference ground, connect to avss_g 3 vrefp_g ao connection for external c for posi tive reference voltage. 4 extresn_g di pu external reset, 3.3v schmitt - trigger input with internal pull - up, high - low transition causes system restart 5 reserved r factory use only, leave floating 6 ahvvdds_g ao hv (~30v) connection for external c for h igh voltage analog supply. high voltage pad ~ 30v 7 lhv ai hv (~30v) connection for inductor for high voltage generation, high voltage pad ~ 30v 8 dvdd_g ai digital supply voltage 9 dvss_g ai digital supply return 10 miso_g doz data out of spi interfa ce, 3.3v level. 11 sck_a di pd clk signal of spi interface, 3.3v schmitt - trigger input 12 mosi_a di pd data in of spi interface, 3.3v schmitt - trigger input 13 reserved r factory use only, leave floating 14 dvdd_a ai digital supply voltage 15 dvss_a ai digital supply return 16 heat ai heatsink connection, connect to avss_g. 17 heat ai heatsink connection, connect to avss_g. 18 reserved r factory use only, leave floating 19 avss_a ai analog supply return 20 avdd_a ai analog supply voltage 2 1 csb_a di pu chip select of spi interface, 3.3v schmitt - trigger input 22 miso_a doz data out of spi interface, 3.3v level 23 mosi_g di pd data in of spi interface, 3.3v schmitt - trigger input 24 sck_g di pd clk signal of spi interface, 3.3v schmitt - tri gger input 25 csb_g di pu chip select of spi interface, 3.3v schmitt - trigger input 26 reserved r factory use only, leave floating 27 reserved r factory use only, leave floating 28 avdd_g ai analog supply voltage 29 avss_g ai analog supply return 30 reserved r factory use only, leave floating 31 reserved r factory use only, leave floating 32 heat ai heat sink connection, connect to avss_g. notes: 1) a = analog, d = digital, i = input, o = output, z = tristate output, r = reserved 2) pu = int ernal pull up, pd = internal pull down, hv = high voltage
scc1300 - d0 2 murata electronics oy subject to changes 8 / 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 2.5 digital i/o specification table 5 (gyroscope interface) and table 6 (accelerometer interface) below describe the dc characteristics of the scc13 00 sensor ?s digital i/o pins. the d igital supply voltage is 3.3v unless otherwise specified. c urrent flowing into the circuit has a positive value. table 5 . scc1300 gyroscope spi interface dc characteristics parameter conditions sy mbol min typ max unit input terminal csb_g pull up current v in = 0v i pu 10 50 a input high voltage dvdd_g = 3.3v v ih 2 dvdd_g v input low voltage dvdd_g = 3.3v v il 0.8 v hysteresis dvdd_g = 3.3v v hyst 0.3 v input terminal sck_g input high voltage dvdd_g = 3.3v v ih 2 dvdd_g v input low volt age dvdd_g = 3.3v v il 0.8 v hysteresis dvdd_g = 3.3v v hyst 0.3 v input leakage current 0 < v miso < 3.3v i leak - 1 1 ua output terminal mosi_g input high voltage dvdd_g = 3.3v v ih 2 dvdd_g v input low v oltage dvdd_g = 3.3v v il 0.8 v hysteresis dvdd_g = 3.3v v hyst 0.3 v pull down current v in = v dvdd_g i leak 10 50 ua output terminal miso_g (tri - state) output high voltage i out = - 1ma v oh dvdd_g - 0.5v v i out = - 50a dvdd_g - 0.2v v output low voltage 0 ? v miso ? 3.3v v ol 0.5 v capacitive load 200 pf table 6 . scc1300 accelerometer spi interface dc characteristics parameter conditions symbol min typ max unit input terminal csb_a pull up current v in = v i pu 10 50 a input high voltage dvdd_a = 3.3v v ih 2 dvdd_a v input low voltage dvdd_a = 3.3v v il 0.8 v hysteresis dvdd_a = 3.3v v hyst 0.18 v input terminal mosi_a, sck_a pull down current v in = 3.3v i pd 10 50 a input high voltage dvdd_a = 3.3v v ih 2 dvdd_a v input low voltage dvdd_a = 3.3v v l 0.8 v hysteresis dvdd_a = 3.3v v hyst 0.18 v output terminal miso_a output high voltage i > - 1ma dvdd_a = 3.3v v oh dvdd_a - 0.5v v output low voltage i < 1 ma v ol 0.5 v capacitive load 50 pf tri - state leakage 0 < v miso < 3.3v i leak - 3 3 ua
scc1300 - d0 2 murata electronics oy subject to changes 9 / 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 2.6 spi ac characteristics the ac chara cteristics of the scc1300 are defined in figure 4 and table 7 . csb _g, csb _a sck_g, sck _a mosi _g, mosi_a miso _g, miso_a t ls1 t ch t hol t set t val1 t val2 t lz t ls2 t lh msb in msb out lsb in lsb out data out data in t cl figure 4 . timing diagram of spi communication table 7 . timing c haracteristics of spi c ommunication parameter condition min typ max unit f spi 0.1 8 mhz t spi 1/ f spi t ch sck_g, sck_a high time 45 t spi /2 ns t cl sck_g, sck_a low time 45 t spi /2 ns t ls1 csb _g, csb_a setup time 45 t spi /2 ns t val1 delay csb_g - > miso_g delay csb_a - > miso_a 30 ns t set mosi_g, mosi_a setup time 30 ns t hol mosi_g, mosi_a data hold time 30 ns t val2 delay sck_g - > miso_g delay sck_a - > mis o_a 40 ns t ls2 csb_g, csb_a hold time 45 t spi /2 ns t lz tri - state delay time 30 ns t rise rise time of the sck_g, sck_a 10 ns t fall fall time of the sck_g, sck_a 10 ns t lh time between spi cycles 125 ns
scc1300 - d0 2 murata electronics oy subject to changes 10/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 2.7 measurement axis and directions the positive/negative acceleration and angular rate measurement directions of the s cc1300 are shown below in figure 5 . figure 5 . a cceleration and angular rate measurem ent directions of the s cc1300
scc1300 - d0 2 murata electronics oy subject to changes 11/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 2.8 package characteristics 2.8.1 package outline drawing the p ackage outline and dimensions of the s cc1300 are presented in figure 6 and table 8 . figure 6 . p ackage outline and dimensions of the s cc1300 . all tolerances are according to iso2768 - f (see table below) unless otherwise specified. limits for linear measures (iso2768 - f) tolerance class limits in mm for nominal size in mm 0.5 to 3 above 3 to 6 above 6 to 30 above 30 to 120 f (fine) 0.05 0.05 0.1 0.15 table 8 . p ackage dimensions of the s cc1300 component parameter min typ max unit length without leads 19.71 mm width without leads 8.5 mm width with leads 12.1 mm height with leads (including stand - off and emc lead) 4.60 mm lead pitch 1.0 mm
scc1300 - d0 2 murata electronics oy subject to changes 12/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 2.8.2 pcb footprint the footprint dimensions of the s cc1300 are presented in figure 7 and table 9 . figure 7 . f ootprin t of the s cc1300 table 9 . fo otprint dimensions of the s cc1300 component parameter min typ max unit footprint length without lead footprints 15.7 mm footprint width without lead footprints 13.0 m m footprint lead pitch long side leads 1.0 mm footprint lead length 2.20 mm footprint lead width long side leads 0.7 mm 2.9 abbreviations asic application specific integrated circuit spi serial peripheral interface rt room temperature stc self t est continuous (continuous self testing of accelerometer element) sts self test static (gravitation based self test of accelerometer element) arw angular random walk dps degrees per second
scc1300 - d0 2 murata electronics oy subject to changes 13/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 3 general product description the scc1300 sensor consists of indep endent acceleration and angular rate sensing elements and separate independent application specific integrated circuits (asics) used to sense and control those element s. figure 8 represents an upper level block diagram of the comp onent. both asics have their own independent digital spi interfaces used to control and read the accelerometer and the gyroscope. figure 8 . b lock diagram of the s cc1300 the angular rate and acceleration sensing elements are man ufactured using murata 's proprietary high aspect ratio (har) 3d - mems process , which enables robust, extremely stable and low noise capacitive sensors . the acceleration sensing element consists of four acceleration - sensitive masses. acceleration causes a capacitance change that is converted into a voltage change in the signal conditioning asic. the angular rate sensing element consists of moving masses that are purposely exited to in - plane drive motion . rotation in the sensitive direction causes out - of - pl ane movement that can be measured as capacitance change with the signal conditioning asic. 3.1 factory calibration scc1300 sensors are factory calibrated. no separate calibration is required in the application. p arameters that are trimmed durin g production in clude sensitivities , offset s and frequency response s . calibration parameters are stored to non - volatile memory during manufacturing. the parameters are read automatically from the internal non - volatile memory during start - up. it should be noted that assem bly can cause minor offset/bias errors to the sensor output. if the best possible offset/bias accuracy is required, system level offset/bias calibration (zeroing) after assembly is recommended .
scc1300 - d0 2 murata electronics oy subject to changes 14/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 4 reset and power up after start - up the angular rate and acceler ation data is immediately available through spi registers. there is no need to initialize the gyroscope or accelerometer before starting to use it. if the application requires operation correctness to be monitored, several self diagnostic features are avai lable . f or more details about enabling the self diagnostic features , refer to the gyro and accelerometer power - up sequences ( s ections 4.1 and 4.2 ). 4.1 gyro power - up s equence after power - up read the s tatus register (0x08) twice to clear self diagnostic error flags ( see table 12 for more details about gyro self diagnostics) . angular rate data is available immediately after start - up without any additional configuration commands . table 10. g yroscope power - up sequence of the scc1300 procedure function set v dvdd_g v=3.0...3.6v set v avdd_g v= 4 . 75 ... 5 . 25 v wait 800 ms read status register (08h) two times acknowledge error flags after start u p 4.1.1 gyro reset the scc1300 gyroscope can be reset by writing 0x04 to the ic identification register (address 07h) or by using the external active low reset pin (extresn_g). power supplies should be within the specified range before the reset pin can be rel eased. p lease follow the gyro power - up sequence after reset ( table 10). 4.2 accelerometer power - up s equence n o initial configuration is needed before starting to measur e acceleration. however , if the device ?s self diagnostic features are being used , the following operations need to be performed after powerin g - up the device ( see section 5.4.5 for more details about the accelerometer ?s self diagnostics) . table 11. a ccelerometer powe r - up sequence of the scc1300 procedure function check set vdd = 3.0...3.6 v release part from reset wait 35 ms memory reading and self - diagnostic . settling of signal path read int_status acknowledge for possible saturation (sat - bit) check that memory checksum passed spi frame fixed bits spi st = 0 write ctrl = 00000000 or ctrl = 00001000 or ctrl = 00001010 set porst = 0 set porst = 0, start stc set porst = 0, start stc, start sts spi frame fixed bits spi frme = 0 spi st = 0 spi sat = 0 wai t 10 ms sts calculation read ctrl check that stc is on, if enabled check that sts is over , if enabled ctrl.st = 1 ctrl.st_cfg = 0 spi frame fixed bits spi frme = 0 spi porst = 0 spi st = 0 spi sat = 0 dpar, data parity read z_msb, z_lsb, y_msb, y_lsb, x _msb, x_lsb read acceleration data spi frame fixed bits spi frme = 0 spi porst = 0 spi st = 0 spi sat = 0 dpar, data parity
scc1300 - d0 2 murata electronics oy subject to changes 15/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 4.2.1 accelerometer reset the a ccelerometer can be reset by writing 0ch, 05h, 0fh (in this order) into the reset register (address 03h). if the accelerometer ?s self diagnostic features are being used , the power - up sequence should be executed after reset ( table 11).
scc1300 - d0 2 murata electronics oy subject to changes 16/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5 component interfacing 5.1 spi interface s the scc1300 s ensor has individual spi interfaces for the accelerometer and angular rate sensor , and they need to be addressed separately. both interfaces have their own 4 - wire interconnection pins in the component package. spi communication transfers data between the spi master and registers of the scc1300 ?s asi cs . the scc1300 ?s asics always operate as slave device s in master - slave operation mode . 3 - wire spi connection cannot be used. scc1300 a ngular rate sensor ?s asic spi interface: mosi_g master out slave in p asic miso_g master in slave out asic p sck_g serial clock p asic csb _g chip select ( active low) p asic scc1300 a ccelerometer ?s asic spi interface : mosi _a master out slave in p asic miso _a master in slave out asic p sck _a seri al clock p asic csb _a chip select ( active low) p asic please note that exactly the same spi routines do not work for both asics! for example, the scc1300 accelerometer asic uses 8 - bit addressing , while the scc1300 angular rate sensor asic uses 16 - bit addressing. both spi interfaces and instructions for using them are explained separately in the following chapters. for more details , please refer to ? technical note 92 : spi communication with scc1300 ?. 5.2 gyroscope interface this chapter describes the scc1300 angular rate sensor asic interface and how to use it. the angular rate sensor asic spi interface uses 16 - bit addressing . 5.2.1 gyro spi communication overview the spi communication is based on 16 - bit words . the spi frame s consist of a multiple of th ese 16- bit words. figure 9 shows an example of a single spi data transmission. the g yro capture s data on the sck's rising edge (mosi line) and data is propagated on the sck?s falling edge ( miso line ) . this is equal to spi mode 0 ( cpol = 0 and cpha = 0). the spi transmission is always started with the csb falling edge and terminated with the csb rising edge. the basic r ead/ w rite data frame consists of two 16 - bit words. the f irst word contains a register address , while the s econd wo rd contains the register content to be written or read ( see timing diagram i n figure 9 ).
scc1300 - d0 2 murata electronics oy subject to changes 17/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c figure 9 . spi communication timing diagram after the csb falling edge the device interprets the first 16 - bit word as a 7 - bit register address and a read/write operation bit. remaining bits shall be set to zero. bit [0] of the 16 - bit word is used as an odd parity bit. the 16 - bit address word is shown below in detail: mosi a ddress word: adr[6 :0] : register a ddress rw : rw = 1 : write access rw = 0 : read access p ar odd : o dd parity bit. p ar odd = 0 : the number of ones in the address word (d15:d1) is odd. p ar odd = 1 : the number of ones in the address word (d15:d1) is even. the adr bits are used to select an internal register of the device; the rw bit selects the access mode for the selected register . the p ar odd bit has to be calculated and inserted by the master in order to complete the transmission . 5.2.2 gyro spi read frame when the a ddr ess w ord bit rw is ?0 ', the m aster performs a read access on the register selected by the r egister a ddress bits ( adr ) . after transmission of the a ddress w ord, the master h as to send an additional word ( z ero v ector ) t o clock the data out from the mosi . data is transferred out from the mosi msb first. example of how to read the rate output mcu begins the communication by sending the a ddress w ord (rate_x register address is 00h , rw=?0? and par odd=?1? ) followed by the z ero v ector (with correct parity ; in thi s case ? par odd? bit value will be 1 ). the z ero v ector is necessary for the sensor to be able to reply to the mcu during the last 16 - bit frame. the sensor replies by sending first the status bits followed by the rate data . mosi: 0x0001 0x0001 miso: 0x3ffe 0x xxxx the complete read frame transmission length is 32 bits ( see figure 10 below ). d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 0 0 adr6 adr5 adr4 adr3 adr2 adr1 adr0 rw fixed 0 par odd
scc1300 - d0 2 murata electronics oy subject to changes 18/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c figure 10 . complete gyroscope read frame e ncoding of the miso s tatus f la gs are shown below . status f lags ( 1 st 16 - bit word on the miso line) in case status flags are cleared after g yro start - up (see section 4.1 ) : s_ok is generated out of the monitoring flags in the status register (08h). dat a w ord ( 2 nd 16- bit word on the miso line) : do [ 13 :0] : value of the angular rate register (14 bits) s_ok: sensor ok flag p ar odd : o dd parity bit. p ar odd = 0 : the number of ones in the data word (d15:d1) is odd. p ar odd = 1 : the number of ones in the data word (d15:d1) is even. see section 5.3.1 for details on angular rate data conversion. d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 s_ok par odd d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 do13 do12 do11 do10 do9 do8 do7 do6 do5 do4 do3 do2 do1 do0 s_ok par odd
scc1300 - d0 2 murata electronics oy subject to changes 19/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.2.3 gyro spi write frame when the a ddress w ord bit rw is ?1', the master performs a write access on the register selected by the r egister a ddress ( adr ) . the scc1300 writes the next word transmitted by the master (data word) in the selected register and sends the data that has been previously stored in this register out from the miso . if the device is addressed with a non - ex istent register address , the response from the miso will be 0 x0000 . the following table shows data encoding for write access : data w ord: d i [14:0] : d ata value for write access (15 bit s ) p ar odd : o dd parity bit par odd = 0 : the number of on es in the data word (d15:d1) is odd. par odd = 1 : the number of ones in the data word (d15:d1) is even. an e xample of a complete write frame transmission is given in figure 11 ( g yroscope soft reset) : figure 11. gyroscope soft reset frame d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 di14 di13 di12 di11 di10 di9 di8 di7 di6 di5 di4 di3 di2 di1 di0 par odd
scc1300 - d0 2 murata electronics oy subject to changes 20/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.2.4 gyro spi mixed access mode it is possible to mix the write and read access modes during one communication frame . mixed access mode can be used , for example , to make an interleaved read of both angular rate and temperature data within the same spi frame. figure 12 shows an ex ample of an interleaved read access : figure 12. spi read interleaving each communication word in figure 12 contain s 16 sck cycles. a fter the communication start condition ( csb falling edge) , the m aster sends the a ddress w ord adr1 with the address of the rate_x register (0x00), r/w = '0' ( read access ) and o dd p arity . all c ombined, adr 1 = 0x01. in parallel the scc1300 sends out the s tatus f lags. during transmission of the next a ddress w ord adr2 , the scc1300 sends out the register value specified in adr1 (r ate _ x ). on adr2 the master performs another read access , now to the temp register (0x0a) . the a ddress w ord adr2 will be 0x51 (t emp register a ddress 0x0a shifted to left by 3 bits and added odd parity bit ; see figure 9 for more details ). to receive the register value of the second read access (tem p erature ) , the m aster has to send an additional word to the mosi (zero vector with odd parity ).
scc1300 - d0 2 murata electronics oy subject to changes 21/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.3 gyroscope asic addressing space the gyro scope asic has multiple register and eeprom blocks. the eeprom blocks used for holding calibration data are programme d via spi during the manufacturing process. the u ser only needs to access the d at a r egister b lock at addresses 00 h , 07h , 08h and 0ah. the content of this register block is described below. table 12. gyroscope r egister address space address hex register name bits read/ write description 00h rate_x 15:2 r rate sensor output in two's complement format 1 r s_ok flag 1 ? rate_x and temp valid 0 ? rate_x and/or temp invalid s_ok is generated from internal monitoring flags shown in the status register (08h). if any of the flags in register 08h [15:2] is 0, s_ok will be 0 only if all flags in register 08h [15:2] are 1, s_ok will be 1 0 r odd parity bit 07h ic identification 15:3 r/w reserved, write all to 0 2 r/w soft reset setting this bit to 1 to resets the logic core , see section 4.1.1 for more details . 1 r/w reserved, write to 0 0 r/w odd parity bit 08h status/config 15:10 r reserved 9 r parity_ok this bit is set as soon as the spi logic detects a wrong parity bit received from the c. the bit is automatically cleared during read access to this register. 1 ? parity check ok 0 ? parity error 8:1 r reserved 0 r odd parity bit 0ah temp 15:2 r temperature sensor output in two 's complement format 1 r s_ok flag 1 ? rate_x and temp valid 0 ? rate_x and/or temp in valid 0 r odd parity bit 5.3.1 angular r ate o utput r egister angular rate data is presented in 14- bit, 2?s complement format. b its [1:0] do not contain angular rate dat a and they must be discarded. rate_x bit weights are shown in below : table 13 . gyroscope rate output bit weights [dps] (sensitivity 50 lsb/dps) . d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 s 81.92 40.96 20.48 10.24 5.12 2.56 1.28 0.64 0.32 0.16 0.08 0.04 0.02 s_ok par odd s = sign bit
scc1300 - d0 2 murata electronics oy subject to changes 22/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.3.1.1 example of r ate d ata c onversion acco rding to the gyroscope register map ( table 12 ) the bits 1:0 do not contain rate data and they must be discarded when converting rate register data to angular speed. for example: the rate_x register (address 0x00) data is 0xff95 . the bits 1:0 need to be discarded and as as the rate is presented in 2's complement format , this can be done as an arithmetic shift right by 2 to handle the number sign correctly. so the actual data for rate calculation will be 0xffe5 which equals - 27 deci mal. the s ensitivity of the scc1300 - d0 2 is 50 lsb/( /s) (table 2) so the rate in degrees per second will be: rate_x[dps] = - 27[lsb] / 50 lsb/dps = - 0.54 dps 5.3.2 gyro temperature output register the gyroscope asic offers temperature information that has a li near response to temperature change. the temperature sensor reading does not reflect absolute ambient temperature. to use the temperature sensor as an absolute temperature sensor , the offset and sensitivity shou ld be measured and calibrated at system level . temperature data is presented in the t emp register (0x0a) in 14 - bit, 2's complement format. the bits 1:0 do not contain temperature data and they must be discarded when making temperature calculations. the t emperature register ? s typical output at +23 c is - 1755 counts , and 1 c change in temperature typically corresponds to 65 count s . temperature information is converted from counts to [c] as follows : [ ] [ ] 65 / ) 3250 + ( = o lsb temp c temp , where temp[lsb] is the temp register content in counts and temp[c] is the equivalent temperature in celsius . temperature sensor offset calibratio qhuurudw?&???& 7hpshudwxuhvhqvruvhqvlwlylw\fdoleudwlrqhuuru? 5.3.2.1 example of gyro t emperature c onversion for example: the t emp register (0x0a) data is 0xef5a . the bits 1:0 need to be discarded ( tabl e 12) so the actu al temperature data will be 0xfbd6 m which equals - 1066 decimal . using the conversion formula above the ac tual temperature in c will be: temp[ c] = ( - 1066 + 3250) / 65 = 33.6 c
scc1300 - d0 2 murata electronics oy subject to changes 23/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.4 accelerometer interface this chapter describes the scc130 0 accelerometer sensor asic interface and how to use it. the accelerometer sensor asic spi interface uses 8 - bit addressing. 5.4.1 accelerometer spi communication overview each communi cation frame contains 16 bits ( two 8 - bit bytes). the spi frame format and tra nsfer protocol for the accelerometer is presented in figure 13 below . the a ccelerometer capture s data on the sck's rising edge (mosi line) and data is propagated on the sck?s falling edge ( miso line ) . this is equal to spi mode 0 ( cpol = 0 and cpha = 0). the spi transmission is always started with the csb falling edge and terminated with the csb rising edge. figure 13. spi frame format for the accelerometer interface ? mosi ? a5:a0 register address ? r / w read/write selection, '0' = read , ?1? = write ? apar odd parity for bits a5:a0, r/w ? di7:di0 input data for data write ? miso ? bit 1 n ot defined ? frme f r a m e e rror indication ( from previous frame) ? bit 3 - 5 stat us bits ? porst power on reset status ? st self test error ? sat output saturation indicator ? bit 6 fixed bit, always ?0? ? bit 7 fixed bit, always ?1? ? dpar odd parity for output data (do7:do0) ? do7:do0 output data the first 8 bits in the mosi line contain info about the operation (read/write) and the register address being accessed. the f irst 6 bits form an address field for the selected operation, which is defined by bit 7 (?0? = read ?1? = write) and is followed by an odd parity bit (apar) for th e address . the following 8 bits in the mosi line contain data for the write operation and are ignored in case of a read operation. the first bits in the miso line are the f rame e rror bit of the previous frame (frme), the power on r eset s t atus bit (porst) , the s elf - t est status bit (st), the s aturation status bit (sat), the fixed zero bit, the fixed one bit and the o dd p arity bit for output data (dpar). parity is calculated from data that is currently being sent. the following 8 bits contain data for a read operation. during a write operation, these data bits are the previous data bits of the addressed register. for write commands, data is written into the addressed register on the rising edge of the csb. if the command frame is invalid, data will not be w ritten into the register.
scc1300 - d0 2 murata electronics oy subject to changes 24/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c for read commands, t he output register is shifted out msb first to the miso output. a n a ttempt to read a reserved register outputs data of 0x00 . during the csb high state between data transfers, the miso line is kept in high - im pedance state. 5.4.2 accelerometer spi read frame an example of x - axis acceleration read command is presented in figure 14 . 16- bit acceleration data is sent in two 8 - bit data frames. each frame contains a parity bit for data (odd pa rity). the acceleration dat a is presented in 2 ?s complement format. when reading acceleration data, always read the msb register before the lsb register because reading of msb latches the lsb so the data in both registers will be from the same moment in time. the m aster gives the register address to be read via the mosi line: '05' in hex format and '000101' in binary format, register x_msb. the 7 th bit is set to '0' to indicate a read operation , and the 8 th bit is 1 for odd parity. the senso r replies to the requested operation by transferring the register content via the miso line. after transferring the x_msb register content, the master gives next register address to be read: '04' in hex format and '000100' in binary format, register x_lsb. the sensor replies to the requested operation by transferring the register content msb bit first. figure 14 : example of 16- bit acceleration data transfer from registers x_msb, x_lsb (05h, 04h) do15?do0 bits are a cceleration data (do15 = msb) and parity (dpar) is odd parity for each 8 - bit data transmission . frme is the possible frame error bit of previous frame, porst is the reset bit, st is the self - test status bit and sat is the output saturation status bit. see section 5.5.2 for details about acceleration data conversion.
scc1300 - d0 2 murata electronics oy subject to changes 25/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.4.3 acc e lerometer spi write frame an example of a ctrl register write command is presented in figure 15 . the m aster gives the register address to be written via the mosi line: the ctrl register is '01' in hex format and '000001' in binary format. the 7 th bit is set to '1' to indicate a write operation , and the 8 th bit is 1 for odd parity. miso data bits do0 ... do7 are the pr evious data bits of the ctrl register . figure 15. example of ctrl register write, set porst = 0, start stc (see table 11) 5.4.4 accelerometer decremented r egister r ead o peration figure 16 shows a decremented read operation where the content of four output registers is read by one spi frame. after normal register addressing and reading of one register content , the m cu keeps the csb line low and continues supplying sck pulses. after every 8 sck pulses , the output data address is decremented by one and the previous acceleration output register's content is shifted out without parity bit s . the p arity bit is calculated a nd transferred only for the first 8 bits of data . from the x_lsb register address the asic output address jumps to z_msb. decremented reading is possible only for registers x_lsb ... z_msb. accelerometer output registers are not updated during csb low sta te , so the decremented read operation can be used to read all acceleration output register s' (z_msb ... x_lsb) content from the same moment of time. decremented read is not recommended in fail - safe critical applications , because output data parity is only available for the first 8 bit s of data. figure 16 . an example of decremented read operation
scc1300 - d0 2 murata electronics oy subject to changes 26/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.4.5 accelerometer spi error conditioning (self diagnostics) 5.4.5.1 frme bit i f the csb is raised to ' 1 ' before sending all 16 scks in a frame , the frame is considered invalid. to support the decremented mode reading, t he fram e e rror is raised if the number of sck pulses is not divisible by 8. the frme bit is also set in case a wrong address parity (apar) is sent. when an invalid frame is received, the last command is simply ignored and the register contents are left unchanged. the b it status.frme in the status register (0x02) is set to indicate this error condition. during the next spi frame this error bit is sen t out as frme status bi t on the miso line . the f rame error condition will be reset only when a correct frame is received. 5.4.5.2 porst bit the porst bit is set if the chip is reset (hw reset by p ower o n r eset or supply on/off) or under voltage is detected. this bit is also set after p ower - up because the chip has been in a reset state. porst can be set to zero (reset) by writing ctrl.porst = 0. software (sw) reset does not set the porst bit . when ctrl.porst bit is written to 0 via the spi, there is a 300ns delay before the register val ue is set to zero. 5.4.5.3 st bit the s elf - test frame status bit (st) is set if stc or sts is alarmed or memory checksum test is not passed. ? case 1: checksum fails and the st frame bit is set to 1. st is set back to zero only when a new checksum calculation is p assed. ? case 2: the st frame bit is set to 1 because stc or sts is alarmed. in this case the st frame bit can be cleared by reading the int_status register. 5.4.5.4 sat bit the s aturation status (sat) is set to 1 if any of the axis x,y,z output values is saturated . sat can be cleared by reading the int_status register. this bit is kept high even after the failure condition is over if not cleared by reading the int_status register . 5.4.5.5 apar bit the apar is an odd parity bit of input address + r/w - bit. the m aster write s and the slave check s t his bit. ? if there is a parity error and r/w = '1', the write command is ignored and the frme (frame error) bit is set in the status register and in the spi frame. the n ext correct spi frame will zero this bit. ? if there is a parity error and r/w = '0', the read command is performed normally and the frme bit is set in the status register and in the spi frame. the n ext correct spi frame will zero this bit.
scc1300 - d0 2 murata electronics oy subject to changes 27/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c table 14. examples of correct a ddress parity bit value address a5 a4 a3 a2 a1 a0 r/w apar 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 0 5.4.5.6 dpar bit the dpar bit is an odd parity bit for 8 - bit data that is currently sent in the frame. the m aster compares this bit to the received data. by u sing dpar , at least 1 - bit errors in data transmission can be detected. 5.4.5.7 fixed bits bits 6 and 7 in the miso line are always fixed. bit 6 should always be '0' and bit 7 always '1' . t hese bits can be used to verify that the miso line is not permanently stuck to '1' or '0'. 5.4.5.8 spi error effect on acceleration output data 1. reset stage: when the component is in reset or under voltage state, the porst bit in the spi frame and the ctrl.porst bit are set. in addition , all acceleration output register values are set to zero . 2. saturation: when acceleration exceeds the sensor ?s measurement range, the output data is saturated to 2 . 27 g ( - 4096 / 4095 counts) 3. self - diagnostic failure: t he st bit in the spi frame is set when the memory diagnostic or signal path diagnost ic functions fail. in addition, acceleration output data is forced to 0x 7fff if memory diagnostic fails or to 0x ffff if signal path diagnostic functions (stc/sts) fail.
scc1300 - d0 2 murata electronics oy subject to changes 28/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.5 accelerometer asic addressing space the scc1300 accelerometer asic register contents and bit definitions are described in detail in the following sections. table 15. accelerometer r egister address space address hex register name bits read/ write description 01h ctrl 7:0 r/w please refer to table 16 for ctrl register details. 02h status 7:2 r reserved 1 r csmerr: eeprom checksum error 1 ? e rror , 0 ? no error csmerr also sets st bit in spi frame 0 r frme: spi frame error. bit is reset when next correct spi fra me is received. frme also sets frme bit in spi frame 03h reset 7:0 r/w writing 0c'hex, 05'hex , 0f'hex in this order resets component 04h x_lsb 7:0 r x - axis lsb data frame (read always x_msb prior to x_lsb) 05h x_msb 7:0 r x - axis msb data bits (reading of this register latches x_lsb) 06h y_lsb 7:0 r y - axis lsb data frame (read always y_msb prior to y_lsb) 07h y_msb 7:0 r y - axis msb data bits (reading of this register latches y_lsb) 08h z_lsb 7:0 r z - axis lsb data frame (read always z_msb prior to z_lsb) 09h z_msb 7:0 r z - axis msb data bits (reading of this register latches z_lsb) 12h temp_lsb 7:0 r data bits [7:0] of temperature sensor always read temp_msb prior to temp_lsb 13h temp_msb 7:0 r data bits [15:8] of temperature sensor reading of th is register latches temp_lsb 16h int_status 7 r reserved 6 r sat: saturation status of output data 1 ? over range detected, at least one of xyz axis is saturated and output data is not valid. 0 ? data in range sat bit is also visible in spi frame. this bit can be active after start - up, reset or porst stage before signal path settles to final value . if accelerometer self diagnostics is used follow power - up sequence to acknowledge this bit ( table 11 ). 5 r sts: status of gravitation based start - up self test 1 ? failure 0 ? no failure sts also sets st bit in spi frame 4 r stc: status of continuous self test 1 ? failure 0 ? no failure stc also sets st bit in spi frame 3:0 r reserved 27h id 7:0 r customer readable component identification number, value 27 h note: int_status: the bits in the interrupt status register and the corresponding spi frame bits are cleared after this register has been read. register reading is treated as interrupt acknowle dgement signal. b its in this register are kept active even if the failure condition is over until they are acknowledged by reading the register .
scc1300 - d0 2 murata electronics oy subject to changes 29/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.5.1 control register (ctrl) table 16 . scc1300 accelerometer ctrl control register (add ress 01h) bit level description bit mode initial value name description 7 r / w 0 reserved, write to 0 6 rw 0 porst 1 means reset state. bit is set to 1 when the chip is reset by supply off control or under voltage control. bit is set after supply off/on transition or startup. this bit can not be set by spi but it can be reset by writing a 0 to it . this bit is also sent as bit3 (porst) of spi output data frame on miso. 5 r/w 0 pdow write 1 to s et accelerometer to power down mode 4 r / w 0 reserved, writ e to 0 3 r / w 0 st write 1 to enable continuous self test calculation (stc). this bit can not be set to 1 if ctrl. pdow or ctrl. m st is already 1 or if ctrl. pdow or ctrl. m st is being set by the current spi command. use int_status.stc and the st bit in spi fr ame for test result monitoring. 2 r / w 0 mst memory self - test function is activated when user sets this bit to 1 . th e bit is reset to 0 when self test is over. this bit can not be set to 1 if ctrl. pdow is already 1 or if ctrl. pdow is being set by the curr ent spi command. test is done automatically during start - up. set other bits in ctrl register to zero with a separate spi command before starting memory self - test with ctrl.mst command. use status.csmerr and the st bit in spi frame for test result monitorin g. during memory self test, spi access is prevented for 85us. 1 r / w 0 st_cfg write 1 to s tart gravitation based start - up self - test calculation (sts). this bit can not be set to 1 if ctrl. pdow or ctrl. mst is already 1 or if ctrl. pdow or ctrl. mst is being s et by the current spi command. stc and sts have same priority and they can be set and used simultaneously. this bit is set to 0 when test is over. use int_status.sts and st bit of spi frame for test result monitoring. 0 r / w 0 reserved, write to 0 5.5.2 acc eler ation output registers acceleration data is presented in 14 - bit, 2's complement format in registers x_lsb ? z_msb . at 0 g acceleration the output is ideally 0000h. acceleration data bit weights are shown i n tabl e 17: table 17 . acc eleration output bit weights [ mg ] (sensitivity 1 8 00 lsb/g) . 5.5.2.1 example of acceleration data conversion for example, if x_msb = 0xfa and x_lsb = 0xec, the combined x - axis acceleration data is 0xfaec. accelerati on output bit 0 is not used and needs to be discarde d ( table 17 ) . as the data is presented in 2's complement format , the number sign needs to be handled correctly . t his can be done as an arithmetic shift right by 1 . so the actual data for acceleration calculation will be 0xfd76 which equals - 650 decimal. the s ensitivity of the scc1300 - d0 2 is 18 00 lsb/g ( table 2 ) so the acceleration in g's will be: x_acc[g] = - 650[lsb] / 180 0 lsb/g = - 0. 361 g dout msb bits(7:0) dout lsb bits(7:0) d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 s s s 1137.8 568.9 284.4 142.2 71.1 35.6 17.8 8.89 4.44 2.22 1.11 0.56 x s = sign bit
scc1300 - d0 2 murata electronics oy subject to changes 30/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 5.5.3 accelerometer t emperature o utput registers o ffset of the accelerometer temperature data is factory calibrated , but sensitivity varies from part to part. temperature data is presented in 13 - bit unsigned format and uses 13 bits (13:1 ) of t emp_msb/temp_lsb registers . always read temp_msb prior to temp_lsb because reading the msb register latches the lsb register. 5.5.3.1 example of a ccelerometer temperature conversion table 18. bit level description for the accelerom eter temperature registers the t emperature registers? typical output at +23 c is 4096 counts and a 1 c change in temperature typically corresponds to 25.6 counts . temperature information is converted from counts to [c] as follows : [ ] ( ) k temp c temp lsb 4096 10 23 ? + = where temp[c] is temperature in celsius and temp lsb is temperature from temp_msb and temp_lsb reg isters in decimal format, bits(t12 :0). k is the temperature slope factor specified as min typ max unit k 2 2.4 25.6 28.8 lsb/ o c temp msb bits(7:0) temp lsb bits(7:0) d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x t12 t11 t10 t9 t8 t7 t6 t5 t4 t3 t2 t1 t0 x x = not used
scc1300 - d0 2 murata electronics oy subject to changes 31/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 6 application information 6.1 application circuitry and external component characteristics r ecommended circuit diagram is presented in figure 17 . the c omponent characteristics are presented i n ta ble 19. figure 17. r ecommended circuit diagram of the scc1300 . the o ptional filtering recommendation for a better psrr (power supply rejection ratio) is presented in figure 18 . please note that pssr filtering is optional and not required if the 3.3v power supply is already stab le enough. rc filtering (r1 & c8 without l2) could also be sufficient for most cases. figure 18. optional filtering re commendation to improve psrr if required .
scc1300 - d0 2 murata electronics oy subject to changes 32/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 6.1.1 separate analog and digital ground layers with long power supply lines if power supply routings/cablings are long , separate ground cabling , routing and layers for analog and digital supply voltages should be used to avoid excessive power supply ripple. in the recommended circuit diagram ( figure 17 ) and layout example ( figure 20 ), joint ground is used as it is the simplest solution and is adequate as long as the supply voltage lines are not long (when connect ing the scc1300 directly to c on the same pcb) . table 19. scc1300 external components component parameter min typ max unit c1, c2, c3, c4, c5 capacitance 70 100 130 n f esr @ 1 mhz 100 m ? voltage rating 7 v c 7 capacitance 376 470 564 nf esr @ 1 mhz 100 m ? voltage rating 30 v l1 inductance 37 47 57 h esr l=47 h 5 ? voltage rating 30 v c6 capacitance 0.7 1 1.3 f esr @ 1 mhz 100 m ? option al for better psrr: r1 resistance 10 ? c8 capacitance 4.7 f l2 impedance 1k ?
scc1300 - d0 2 murata electronics oy subject to changes 33/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 6.2 boost regulator and power supply decoupling in layout r ecommended layout for dvdd_g/lhv pin decoupling is shown in figure 19. figure 19 . layout recommendations for dvdd_g/lhv pin decoupling 6.2.1 l ayout example figure 20 . example layout for the scc1300
scc1300 - d0 2 murata electronics oy subject to changes 34/ 34 www.muratamems .fi doc.nr. 82 1130 00 rev. c 6.2.2 thermal connection the component has heat sink pins to transfer internally generated heat from the package to ambient . thermal resistance to ambient should be low enough not to self heat the device. if the internal junction temperature gets too high compared to ambient , this may lead to out of specification be havior . table 20 . thermal resistance component parameter min typ max unit thermal resistance ja total thermal resistance from junction to ambient 50 c/w 6.3 assembly i nstructions u sage of pcb coating ma terials may e ffect component performanc e . the coating material and coating process used should be validated. for additional assembly related details, pl ease refer to ? technical note 82? for assembly instructions .

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